Verification Methodology Manual for SystemVerilog

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Verification Methodology Manual for SystemVerilog

フォーマット:

電子ブック

責任表示:

by Janick Bergeron, Eduard Cerny, Alan Hunter, Andrew Nightingale

言語:

英語

出版情報:

Boston, MA : Synopsys, Inc. and ARM Limited, 2006

形態:

v.: digital

著者名:

書誌ID:

NB02213882

ISBN:

9780387255569 [0387255567]

学内からのみアクセスすることができます。

子書誌情報

オンライン

http://dx.doi.org/10.1007/b135575

所蔵情報

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詳細

主題:	Circuits and Systems; Computer-Aided Engineering (CAD, CAE) and Design; Electronic and Computer Engineering; Electronics and Microelectronics, Instrumentation; Engineering
分類・件名:	LCSH : Computer aided design LCSH : Computer engineering LCSH : Electronics LCSH : Engineering LCSH : Systems engineering FREE : Engineering FREE : Circuits and Systems FREE : Computer-Aided Engineering (CAD, CAE) and Design FREE : Electronic and Computer Engineering FREE : Electronics and Microelectronics, Instrumentation
TTLL:	eng

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